The Open System Interconnection (OSI) model is a well-known seven-layer framework for defining communication protocols. For example, one communication protocol, such as Transmission Control Protocol/Internet Protocol (TCP/IP), is mapped to the transport layer and network layer of the OSI model, respectively. Specifically, the transport layer ensures that packets transmitted from a source computer to a destination computer are received by the destination computer in the correct order. The network layer determines the packet format and the addressing scheme of the source and destination computers.
The lower layers of the OSI model include the data link layer and the physical layer. A communication protocol corresponding to the data link layer defines how the packets are decoded and encoded into bits. Further, a communication protocol corresponding to the physical link layer defines the electrical and mechanical specifications for transmitting a bit stream. From a bottom-up viewpoint of the OSI model, the OSI model includes the physical, data link, network, and transport layers. Accordingly, the source and destination computers that implement the communication protocols of the bottom four layers of the OSI model can communication information.
When communicating a bit stream of information between the source and destination computers, or from one source component to a destination component within a single computer, the bit stream may be affected by magnetic fields and other natural phenomena, thereby potentially causing a bit flip. The bit flip results in erroneous information received at a destination computer or destination component.
To alleviate bit flip problems, some data link layer communication protocols include error checking capabilities. However, other data link layer communication protocols are not capable to alleviating bit flip problems. An exemplary data link layer communication protocol that does not solve such problems is a communication protocol operating over an integrated circuit bus between components of a motherboard of a computer.
A solution to protect against such problems is to provide error checking microcode that is stored in a component of the motherboard. However, providing the microcode requires extra circuitry on the motherboard, which may lead to extra processing cycles by the destination component and an overall increase in the power consumption of the motherboard. The extra circuitry also increases the overall complexity of the motherboard design. For example, by adding extra circuitry, motherboard production costs increase, which leads to an overall increase of the cost of the computer. Finally, complex microcode incurs a software development cost that increases over time because of the need to maintain the microcode.
Thus, what is needed is a solution addressing the communication of erroneous information over an integrated circuit bus of a computer that is simple to implement and maintain while having low power consumption.